Items Tagged with 'ASIC'

ARTICLES

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Who Put That Inductor in My Capacitor?

This article covers the importance of proper calibration, measurement, and de-embedding to ensure that the final capacitor model is free of errors, allowing an accurate representation of the PDN used in simulation. While capacitor models may play a seemingly minor role in the overall system design, the impact of capacitor models can significantly impact the system design and, importantly, design sign-off.


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Break Out Region Design By Inspection

Many systems fail to live up to expectations, frequently because of an implementation failure at the breakout region. In this blog, Travis Ellis, SI engineer at Samtec, discusses connector-to-board transitions and common impairments to their performance.


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Improved Methodology to Accurately Perform System Level Power Integrity Analysis Including an ASIC die

Modern ASIC-based systems can no longer be designed by rules of thumb when it comes to power integrity. In this DesignCon 2022 paper, Ben Dannan et al explain a workflow using lumped-looped models to improve efficiency, while achieving accuracy, and reducing the overall risk to a given system PDN.  



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