Blog Postings

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A Quantum Leap in Data Center Networking

With Help from Spirent, H3C Conducts the Industry’s Highest-Scale 800G Ethernet Test to Date

Artificial intelligence-generated content is rewriting the rules for data center networks, driving a need for extreme throughput and density at unprecedented scales. To meet these requirements, hyperscalers need high-performance 800G network solutions as quickly as vendors can deliver them.


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HSD PCB

Planning PCB Layouts for High-Speed Digital Signals

As circuits shrink and bit rates increase, achieving acceptable signal integrity (SI) requires experience and creativity. It calls for foresight in layout planning to keep signal paths short, which helps minimize interference between closely spaced circuits. Circuit materials must support electrical and mechanical design specifications, and components must be selected for optimum size and placement. All these factors combine to create many challenges when developing an HSD PCB.


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How Interconnects Work: Anatomy of Crosstalk

Crosstalk in PCB and packaging interconnects is arguably one of the most complicated phenomena that may cause signal degradation. Crosstalk effects can be treated statistically as a deterministic jitter with a bounded distribution, but the distribution is usually not known. A direct analysis of a worst-case crosstalk scenario may lead to a system overdesign. Neglecting it in design may cause a system failure that is difficult to find and fix later in a design process. Distortions caused by crosstalk cannot be corrected by signal conditioning techniques at a receiver side. It is very important to understand the sources of crosstalk, how to quantify it and how to mitigate it efficiently, as Yuriy Shlepnev demonstrates in this installation of the "How Interconnects Work" series.


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The Challenge of Measuring a 40 µΩ (2000 Amp) PDN with a 2-Port Probe: The Measurement Result with Another VNA

In the final installment of this blog series, Benjamin Dannan, Heidi Barnes, and Steve Sandler continue their discussion of how to calculate the minimum CMRR with a PDN impedance measurement using a 2-port probe, demonstrating how to measure a sub-40 µΩ impedance when using an isolator that has sufficient CMRR using two different VNAs, the Bode 100 and E5061B. Achieving sub-40 µΩ impedance measurements is challenging, but completely realistic with the proper test equipment. 


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