Power Integrity


Break Out Region Design By Inspection

Many systems fail to live up to expectations, frequently because of an implementation failure at the breakout region. In this blog, Travis Ellis, SI engineer at Samtec, discusses connector-to-board transitions and common impairments to their performance.

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Improved Methodology to Accurately Perform System Level Power Integrity Analysis Including an ASIC die

Modern ASIC-based systems can no longer be designed by rules of thumb when it comes to power integrity. In this DesignCon 2022 paper, Ben Dannan et al explain a workflow using lumped-looped models to improve efficiency, while achieving accuracy, and reducing the overall risk to a given system PDN.  

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Determining FPGA Dynamic Load Current

In this Extreme Measurement story, the goal was to determine the dynamic current of the FPGA by measuring the AC current in an external VRM using a transformation of the PCB S-parameters and the simultaneous measurement of the AC voltages across the PDN.

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Top 5 blogs

Top 5 Blogs of All Time

As rated by reader views, here are the Top 5, Most Read Blogs on SIJ of all time. Thank you for your continued readership, as we look forward to bringing you many more great features in 2022 and beyond!

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