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Via Characterization and Modeling By Z Input Impedance
By HeeSoo LEE, Nathan Hirsch, and Orlando Bell
Design engineers have traditionally used time domain reflectometry (TDR) as a tool to characterize and optimize via designs, yet the TDR approach comes with shortcomings such as demanding shorter rise-time step signal or larger bandwidth S-parameters, and inaccurate read-out on the via impedance. In this article, we propose a simple and effective Z-input impedance method that augments the traditional TDR method for characterizing and optimizing via designs in much faster speed systems.
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TE Connectivity Debuts First Right Angle Cabled Backplane Connectors
TE Connectivity introduced its new right angle cabled STRADA Whisper backplane connectors, the first right angle cabled backplane connectors that are primarily used to connect graphics processing unit (GPU) to GPU within a switch or server, these connectors save valuable space and allow designers to fit inside an enclosure with the right angle cabled design.
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112 Gbps PAM4 Micro Twinax Cable Demonstration
By Samtec
This is a live demonstration of a cost-effective, high-performance solution to the challenges of 56 Gbps and 112 Gbps bandwidth. The results achieved from the combination of Samtec’s FQSFP-DD and AcceleRate cable solutions, and Credo’s 112 Gbps PAM4 CDRs, clearly prove the concept for 112 Gbps PAM4 high speed twinax cable solutions. Watch the demonstration to learn more.
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EDI CON USA 2018 Opens Registration
EDI CON USA has opened its registration for this year’s event, October 17-18 at the Santa Clara Convention Center. The conference will feature Eric Bogatin’s High Speed Digital Symposium, the EDI CON University tutorials, panels, technical sessions, and workshops with hands-on techniques covering SI, PI, EMC/EMI, as well as RF and microwave topics. The exhibition floor will be open both days, complete with exhibitors and demonstrations and panels in the Frequency Matters Theater on the show floor. Join us for learning, networking (welcome reception and happy hour), keynotes, and the opportunity to see the latest products in SI, PI, EMC/EMI, RF, and microwave. See you in Santa Clara! SIJ readers can take 20% off conference pass admission with the code: READSIJ20.
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Best IoT Board Design Practices: Balancing Density, Cost, Low Power, and Mixed Signal
IoT applications with an embedded controller, sensors, actuators and a wireless interface are proliferating in many applications. Most of these designs are cost driven, low power driven and with a specific form factor. We'll introduce the seven most important design guidelines useful for all IoT boards which reduce the chance of SI/PI and EMI problems.
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Practical PCB Layout for SI/PI/EMC: What an EE Needs to Know to Survive PCB Manufacturing
If interconnects were transparent, this would be a very short webinar. But in all except the very simplest boards, the interconnects are not transparent. There are three general performance categories of boards based on the range of problems they will encounter. In the short time we will have, all we can do is introduce the best design practices to pay attention to in each of these three general classes of boards. We'll see how design decisions and board material decisions influence taming SI/PI and EMI problems.
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Visit our archived webinars page for educational resources on various design and measurement subjects and view at your convenience.
Browse webinars here.
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The preceding is from Signal Integrity Journal™, owned by Horizon House Publications Inc., at 685 Canton St., Norwood, MA, 02062, USA. We are online at www.signalintegrityjournal.com and are also available at 781-769-9750. Copyright © 2018. All Rights Reserved. Your email address has not been given to any Third Parties. You have been selected to receive this email because you opted-in to receive information when you provided your email address to Signal Integrity Journal™. To ensure deliverability of emails from Signal Integrity Journal™, we recommend that you whitelist our domain address: mwjournalemails.com.
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