Endura Technologies, a global leader in high-performance power management solutions, today announced an industry-leading benchmark for power delivery to high-performance AI chips. The company’s latest solution achieves less than 30 mV voltage droop with an ultra-fast recovery time of less than 200 ns, even when responding to severe load transients of 1000 A with up to 100 A/ns slew rate. This is accomplished without any additional external output capacitors, relying solely on the existing in-package capacitors within the XPUs. This combination of minimal voltage droop and rapid recovery is critical in improving the overall system performance per watt metric, while supporting the fast, dynamic load changes typical in high-performance AI workloads.

“We are at a critical inflection point in powering AI where integrated voltage regulators (IVRs) are transitioning from a niche solution to a necessity,” said Davood Yazdani, EVP and CPO of Endura Technologies. “The surging power demands of AI and HPC chips demand a complete architectural redesign, introducing a new class of control and power delivery solutions that can effectively manage voltage droop and enable significant system performance improvements. This is precisely where Endura’s Bypass Dual Duty-Cycle (BDDC) architecture shines.”

Endura’s patented BDDC architecture offers a new, system-level approach to power delivery, meeting the escalating demands of high-end computing, particularly for AI-driven systems. Backed by more than 60 patents, Endura's proven, high-performance solution, combined with its vertically IVR architecture, addresses the power management challenges in modern AI chips. Existing off-chip voltage regulators are often too slow and lack the required high bandwidth, forcing AI system designers to sacrifice the chip's full potential. Endura's IVR, conversely, can respond to transient load changes in nanoseconds, essentially minimizing voltage droop.

For more information, visit www.enduratechnologies.com.