Items Tagged with 'interconnect'

ARTICLES

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How to Reduce Attenuation in a Differential Channel

The attenuation in a uniform differential pair has two root causes: conductor loss and dielectric loss. By understanding how design decisions affect these two fundamental root causes, we can develop a few simple guiding principles which point us in the right directions to reduce the attenuation of a channel. These are the directions to follow when loss is important. In some cases, increasing the differential impedance will decrease loss, and in some cases it will increase the loss. Read on to see why.


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Modeling PCB Interconnects with Geometry and Material Parameters Variations for 56 Gbps Links

Measured S-parameters and cross-sections of PCB interconnects are used in this paper to identify the parameters of electrical models suitable for statistical analysis of interconnects with manufacturing variations. The constructed models reproduce observed effects of geometry and material properties variations on the loss, delay, and impedance, and they are suitable for yield analysis of interconnects with up to 56 Gbps signals.


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SIJ EXECUTIVE INTERVIEW_

Executive Q&A: Jairo Guerrero, Molex

What are the greatest technical challenges facing connector designs for future high-speed deployments?Jairo Guerrero of Molex delves into the technical challenges for today’s connectors, the influence of applications such as automotive and data/telecom, and he gives an intriguing glimpse into the product development process at Molex.


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