Signal Integrity Software Inc. announced that it will present two complementary sessions focused on building IBIS-AMI models and how DDR5 AMI models can be applied to systems design.  The sessions, titled “Building AMI Models for DDR5 Applications” and “Applying IBIS-AMI Techniques to DDR5 Analysis”, will be presented on Wednesday, January 31 and Thursday, February 1 at DesignCon 2018.  DesignCon is happening January 30–February 1, 2018 at the Santa Clara Convention Center.

“We’re still in the early stages of applying IBIS-AMI models to DDR-based design, so flexibility in system-level analysis and modeling is crucial,” noted Barry Katz, SiSoft’s president and CTO. “There are multiple ways to analyze DDR interfaces for signal integrity and timing, and the preferred methodology will vary based on the controller being used. Similarly, we’re still experimenting with the feature set for DDR5 AMI models. That’s why we are particularly excited about combining SiSoft’s Quantum-SI and its configurable analysis methodology with MathWorks’ Simulink for AMI model development. We have created a flow where DDR5 silicon vendors can adjust their AMI models and system-level analysis methodology in real time to suit changing needs.”

More information on SiSoft and their activities at DesignCon 2018 can be found at