Looking Under the Hood at High Speed Signaling Specs

By Sherman Shan Chen, Brian Holden, and Tao Hu

Want to know more about the impedance and the encoding schemes adopted by prevailing high-speed I/O (HSIO) standards including PCIe, USB, Thunderbolt, and Ethernet? By looking back at the history of standards, some interesting trends and possible future directions are revealed.

New HD Oscilloscope from Teledyne LeCroy Maximizes Performance, Value

Teledyne LeCroy announced availability of the WaveSurfer 4000HD High Definition Oscilloscope (HDO), the first in its class to feature 12-bit vertical resolution at all times, showing clean, crisp waveforms on a bright, 12.1 in. touch screen display.

New Yorker Electronics Expands Portfolio of 12G Optimized Products to Include MCX Connectors

New Yorker Electronics has added the Amphenol RF 12G MCX connectors to its lineup of 12G Optimized Amphenol RF Connectors. Designed specifically for 4K/Ultra-HD broadcast applications, they are used in 4K/8K video cameras, mobile broadcasting, digital signage and other video applications. These new PCB connectors and cable connectors boast standard 12Gbps performance per SMPTE.

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Verifying Additive Phase Noise and Jitter Attenuation of PLLs in High-Speed Digital Designs

Sponsored By Rohde & Schwarz USA Inc.

Increasing data rates in high-speed digital designs and wireless communications require SerDes PLLs and clock synthesizers with low additive phase noise and high jitter attenuation. Phase noise analyzers are the instruments of choice for these tests. To stimulate the PLL, an additional signal source with ultra-low phase noise is required. Downlaod the app note today.

EDI CON Online Announces 2020 Show Dates

EDI CON Online, an interactive event held for the first time September 10-12, 2019, has posted impressive results for its inaugural year with more than 4400 sessions attended to date. 97% of attendees surveyed noted they would attend another EDI CON Online, and 97% would also recommend the event to a colleague. Event organizers have announced that next year’s EDI CON Online event will take place on consecutive Tuesdays in October, with a plan to offer sessions over four days (October 6, 13, 20, and 27) organized into tracks that are again kicked off by keynote sessions. Read on to discover more.

 

Power Integrity: Challenges, Best Practices, and Test Solutions for Sensitive Electronic Designs

This webinar will discuss power integrity issues, root causes, and countermeasures in sensitive electronic designs. Attendees will learn the impact of noise, jitter, impedance, and examples to detect those sources of power integrity failures. Another thing that will be discussed are methods to reduce respectively compensate those sources and demonstrate oscilloscope and vector network analyzer solutions that engineers benefit from for their design verification. Register now to join us on November 20^th for this informative presentation.

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