Michael Nopp is a product engineer in the Custom IC & PCB Group at Cadence, based in the San Francisco Bay Area. He has worked in the EDA industry for seven years after receiving his BSEE from Oregon State University. He is fascinated with product design and enabling users to build systems.
One of the main challenges of performing analysis upstream is incomplete models used in analysis. Normally the full physical layouts from which extractions are performed on interconnect do not yet exist. So how does one fill in the blanks to perform early analysis?