Stephen Slater leads the SI & PI product planning and marketing team at Keysight EEsof EDA. Over the last decade Stephen has been working closely with customers using Keysight’s Advanced Design System, for high-speed serdes channel simulations, DDR simulation and Electromagnetic simulation for PCB applications. Prior to joining Keysight, Stephen graduated from Griffith University (Australia) with a BS in Electronic Engineering (First Class Honors), and a BS of Information Technology.
Eagerly anticipated, the next generation of DRAM technologies (DDR5/LPDDR5) are presently being validated in the lab by leading silicon vendors worldwide. This latest generation has a big surprise in store for hardware engineers and SI specialists that need to simulate such systems. DDR5 will introduce decision feedback equalization (DFE) for the DRAM receiver for the very first time.