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David Cassan received the M.A.Sc degree in Electrical Engineering from the University of Toronto in 2001. He is currently working at Huawei Canada where he is leading the High-Speed Interfaces Research Team in Toronto. He has more than 15 years of experience in the area of wireline transceivers including analog design, system design, and SI/PI analysis. Previously he was a Director of Engineering at Snowbush IP where he led several generations of their wireline transceiver developments. His research interests include high efficiency and short reach transceiver designs for both electrical and optical applications.
Architectural decisions depend on the ability to adequately analyze the link. This paper presents a methodology to model and evaluate the performance of both center and edge sampling schemes.
