Thomas Hein received the Diploma in information technology from the Technical University of Dresden in 1995. In 1995 he joined Siemens Semiconductors, which became Infineon Technologies and later Qimonda AG, where he led the design of multiple Multi-Bank MDRAM, SGRAM, GDDR1/3/4/5 designs. From 2009 to 2014 he worked for Elpida Memory (Europe) GmbH. In 2014, he joined Micron Semiconductor (Deutschland) GmbH where he currently working on definition and design and of various high-speed GDDR5, GDDR5X and GDDR6 DRAMs. He was the design lead of the 8G GDDR5X. His interests in DRAM design includes new DRAM architectures, chip packaging and high-speed interfaces.