Aravind Nayak

Aravind Nayak is a Principal Engineer with Broadcom Ltd in Allentown, PA. He holds PhD (2004) and MS (2000) degrees in electrical engineering from the Georgia Institute of Technology, Atlanta, GA, and B. Tech (1999) degree in electrical engineering from the Indian Institute of Technology, Madras, India. His research interest include signal processing for the magnetic recording read channel and SerDes applications.


A Study of Forward Error Correction Codes for SAS Channels

This paper evaluates the performance of several choices of Reed-Solomon code and shows how a frame-interleaved RS(30,26) code can achieve 1e-15 bit-error rate (BER) in the presence of burst errors. See the authors conclude that, as data rates go higher, current 128b/130b encoding is not a good option as the two-bit 01/10 overhead suffers due to its Nyquist pattern property.

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Outer Loop Equalization for PCIe Cross-Lane Transceiver Optimization

PCIe Gen4 Standards Margin-Assisted Outer-Layer Equalization for Cross-Lane Optimization in a 16GT/s PCIe Link

PCIe Gen4 enables new wave of innovation to guide inner-loop SerDes optimization assisted by outer-loop system optimization. This paper introduces an outer-layer equalization scheme for managing SerDes inner-layer equalization to optimize overall system-level aggregate performance.

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