Venkatesh Avula received the B. Tech degree in electronics and communication engineering from Cochin University of Science and Technology, India, in 2004, and the M.S. degree in electrical engineering from University of Idaho, USA, in 2016. He has over 10 years of experience in signal and power Integrity areas with companies such as inDSP Audio, KPIT Cummins, Tektronix, LSI, Avago Technologies, Seagate and Micron. His research interests include electromagnetics, signal and power integrity issues in high speed communications. He is a recipient of the Best Poster Paper Award from the IEEE EDAPS 2016 conference and the Outstanding Master's Student Research and Creative Activity Award 2017, University of Idaho, USA.
As systems designers work hard to squeeze more and more features into less board space, the power delivery paths are becoming increasingly complex. The current mature VRM designs based on Silicon MOSFETs are hardly meeting present day requirements. One of the promising technologies touted to solve this conundrum of space and performance constraints is GaN HEMT. However, many engineers are hesitant to design very high frequency GaN VRMs from the ground up. This paper evaluates the steps required to modify existing Si-MOSFET designs for use with eGaN HEMT devices. The paper also compares the expected performance of GaN vs. Si in linear and switching regulator topologies and covers some of the measurement challenges as well.