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At DARPA ERI Summit, academic and commercial industry research groups named to explore how novel compute architectures can halt threats to U.S. microelectronics.

EDI CON USA is pleased to introduce its EDI CON University 2018 program at its event this October 17 and 18 at the Santa Clara Convention Center. These two-hour sessions offer in-depth training in a particular topic, such as MIMO test, amplifier design and measuring impedance.

Passive Plus, Inc. (PPI) has developed a series of Broadband Capacitors available in 4 different case sizes: 01005BB, 0201BB, 0402BB, and 0805BB. Values available are 10nF (10,000 pF) and 100nF (100,000 pF).

Tektronix, Inc., introduced the 6 Series MSO mixed signal oscilloscope. The new oscilloscope extends the performance of midrange oscilloscopes to 8 GHz and delivers a 25 GS/s sample rate simultaneously on all 4 channels. A first for this oscilloscope class, while accommodating the needs of designers working on faster, more complex embedded system designs.

TE Connectivity (TE), has extended its modular twisted pair cable assembly offering with new M12 cable assemblies. Conforming to EN45545 HL3 with fire and smoke characteristics, TE’s M12 cable assemblies are suitable for public transportation and other heavy industrial applications. Their rugged design enables them to withstand the vibrations experienced in trains and other demanding environments.

TE Connectivity (TE) is pleased to announce it has partnered with Annapolis Micro Systems, a leading FPGA board and systems supplier, on the release of three of their new high-performance FPGA boards that feature TE’s NanoRF module.

Passive Plus Inc. has the 01005BB104 broadband 100nF multilayer ceramic capacitors. The 01005BB104 – the smallest 100nF broadband part characterized for RF performance -- has a case measuring (mils) 16 x 8 x 8, and offers resonant-free RF coupling/DC blocking from 16 kHz (lower 3-dB frequency) to beyond 65 GHz with < 1 dB insertion loss and < -15 dB return loss on suitable substrates.

Nanosecond-level clock synchronization can be an enabler of a new spectrum of timing- and delay-critical applications in data centers. However, the popular clock synchronization algorithm, NTP, can only achieve millisecond-level accuracy. Current solutions for achieving a synchronization accuracy of 10s-100s of nanoseconds require specially designed hardware throughout the network for combatting random network delays and component noise or to exploit clock synchronization inherent in Ethernet standards for the PHY.