Anritsu Company announces that its Signal Quality Analyzer-R (SQA-R) MP1900A has been certified as a compliance test solution for PCI Express® (PCIe®) 3.0 technology Link Equalization (Link EQ) tests and Receiver (Rx) Jitter Tolerance tests by the PCI-SIG® consortium. With support for the PCI Express 3.0 specification, as well as expandability to PCI Express 4.0 and 5.0 specifications, the MP1900A helps control capital equipment expenses while supporting various tests, such as PHY layer electrical characteristics and protocol tests, using a high-quality waveform pulse pattern generator (PPG) and high-sensitivity error detector (ED). The newly certified measurement solution will be on display in the Anritsu booth (#741) during DesignCon from January 31 – February 1, 2018.
The integrated solution addresses the market need to shorten inspection times of high-speed serial bus interfaces during development, which has become increasingly more time-consuming due to the complex measurement methods and need to assure interconnectivity. The certified test solution integrates the SQA-R MP1900A with the Teledyne LeCroy SDA830Zi-B Serial Data Analyzer that has up to 30 GHz bandwidth and 80 GS/s sample rate. By offering simple expandability to support future PCI Express 4.0 and 5.0 specifications, the solution doesn’t only improve test times but also reduces cost-of-test.
Engineers can use the integrated solution to perform calibration for evaluating the PHY layer of PCI Express 3.0 (8 GT/s) technology add-in cards and system boards, as well as Link EQ tests for verification of the device-under-test (DUT) communications state. Rx tests to measure the DUT stress tolerance can be performed, as well. Using the SQA-R, which has industry-best performance, and SDA830Zi-B supports high-repeatability testing, as well as troubleshooting analysis. Inclusion of the Teledyne LeCroy SDA also allows support for transmission-side tests, assuring a comprehensive test solution for PCI Express 3.0 architecture DUT.
The SQA-R MP1900A multichannel bit error rate tester (BERT) has an industry-best, high-level, high-waveform-quality PPG with 115 fs intrinsic jitter, high-accuracy jitter generation sources (SJ, RJ, SSC, BUJ) and noise source for generating CM-I/DM-I/white noise. The instrument has a 15 mV high-input-sensitivity ED with embedded clock recovery, allowing accurate BER tests to be made even with a very small closed eye.
It also features a Link Training function, as well as a Link Training and Status State Machine (LTSSM) Analysis function not previously available in a BERT. These unique capabilities make the MP1900A well suited for multiple applications, including compliance tests, margin tests, and troubleshooting. Additionally, the MP1900A provides all-in-one support for PAM4 evaluation of 200G and 400G Ethernet optical modules and network interface cards (NICs) used in data centers, as well as for testing PCI Express technology interfaces being introduced for next-generation data center equipment, to lower capital costs.