Sporadic errors cost valuable time during the development of new products. Debugging protocol-based buses is especially difficult and time-consuming because the communications pauses between the individual data packets can be very long. A deep, segmented memory combined with dedicated trigger conditions solves this problem by permitting the acquisition of relevant sequences without long pauses. Equipped the R&S®RTB-K15 and the R&S®RTM-K15 options, this is exactly what the R&S®RTB2000 and the R&S®RTM2000 offer.
Fast analysis of sporadic errors with the history function and 160/460 Msample memory
