
Signal Integrity Journal Webinar Series
Title: Solving SI/PI Bottlenecks: In-Design Analysis and System-Level Verification with Sigrity X
Date: September 10, 2026
Time: 8am PT / 11am ET
Sponsored by: GoEngineer
Presented by: Talal Azfar, Ph.D., Sr. Technical Specialist - Electrical Solutions, GoEngineer
Abstract:
As electronic systems become faster, smaller, and more densely interconnected, signal and power integrity issues can become major bottlenecks in the PCB development process. Problems like impedance discontinuities, crosstalk, power-delivery noise, voltage drop, current crowding, and electromagnetic coupling often remain hidden until prototype testing, resulting in costly redesigns and delayed product releases.
This webinar introduces the Cadence Sigrity X platform and demonstrates how its analysis capabilities help engineers identify and address these challenges earlier in the design phase.
Rather than focusing deeply on a single analysis method, this session provides a practical map of where each Sigrity X solution fits in the design workflow to help you improve design confidence, reduce physical prototypes, and accelerate product delivery.
What We’ll Cover:
Who Should Attend: PCB designers, electrical engineers, and engineering managers looking to catch SI/PI issues early, streamline their analysis workflow, and reduce hardware revisions.
Presenter Bio:
Talal Azfar Ph.D. got his doctorate in Electrical Engineering from UCLA, with a focus on lasers, fiber optics and RF microwave systems. He has over 15 years of experience in Electromagnetics Simulations and PCB Electronics Design and is currently the technical expert at GoEngineer for Dassault CST Electromagnetic Simulation Suite, Cadence OrCAD X and Allegro X and SolidWorks Electrical Design software.
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