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Overcoming PAM4 Design & Test Challenges in PCIe6

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When

8/30/23 11:00 am to 12:00 pm EDT

Event Description

Signal Integrity Journal Webinar Series

Title: Overcoming PAM4 Design & Test Challenges in PCIe6

Date: August 30, 2023

Time: 8am PT / 11am ET

Sponsored by: Keysight Technologies

Presented by: Rick Eads, Principal Program Manager and Pegah Alavi, Senior Solutions Engineer, Keysight Technologies

Abstract:
Are you ready to embrace the future of data transfer? PCIe 6 is here and is a game-changer for data centers, AI/ML, and cloud computing. It delivers 64 GT/s data rate with PAM4 signaling, a significant leap from previous NRZ-based serial bus technologies. Nevertheless, designing for PCIe 6 is not easy. You must deal with strict tolerances, evolving standards, and new component models you don't have complete control over, such as the connector, host board, transmitter, or receiver. Join Keysight’s PCIe experts to be ahead of the curve by accelerating your PCIe 6 workflow! In this webinar, you will learn:

  • PCIe 6 spec overview and common design pitfalls.
  • Essential test requirements for physical layer testing of transmitters and receivers.
  • How to use reference channels and models to streamline your PCIe Gen6 workflow.
  • Perform virtual compliance testing using simulation and measurement correlation.

Presenter Bios:
Pegah Alavi is a Senior Solutions Engineer at Keysight Technologies, specializing in Signal and Power Integrity for High-Speed Digital Systems and Applications. With a wealth of experience and expertise, Pegah's primary focus revolves around validating and optimizing systems using various High-Speed standards such as PCIe, USB, DDR, IEEE802.3, and CXL, to name a few. Her in-depth knowledge and hands-on approach have led to successfully implementing cutting-edge technologies, ensuring early design success.

Rick Eads is a Principal Program Manager at Keysight Technologies Rick holds a BSEE from Brigham Young University and an MBA from the University of Colorado. Rick actively contributes to developing the PCI Express physical layer BASE, CEM, and Test specifications and has led the Electrical Gold Suite Testing at PCI-SIG workshops worldwide since 2004. Rick currently serves on the PCI-SIG Board of Directors, in addition to being an active contributor to multiple PCI-SIG workgroups.

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