High Speed Digital 3D EM Forum

Title: 3D FEM Solver Scalability: Ready to Go Big? 

Date: May 26, 2021

Time: 1:00pm PT / 4:00pm ET

Presented by: Yash Padooru, Principal Product Engineer, Cadence

Abstract:
Cadence® Clarity™ 3D Solver continues to address the biggest challenges in signal and power integrity due to its speed, capacity, accuracy, and integration with Cadence Implementation platforms.  With the capability to extract DDR5 and GDDR6 interfaces, the only thing holding back some users is access to the necessary compute resources to achieve timely results.  Join this presentation to learn how companies with limited on-prem compute resources now have new choices that enable timely extraction of high speed digital interfaces.

Presenter Bio:
Yash Padooru is currently Principal Product Engineer for Sigrity tools (Clarity3D, PSI, and PDC, among others) at Cadence Design Systems Inc., San Jose, CA. He received the Bachelor’s degree in electronics and communication engineering from the Jawaharlal Nehru Technological University, Hyderabad, India, in 2006, the M.S.E.E. and PhD degree (with emphasis in Electromagnetics) from the University of Mississippi, University, in 2009 and 2012. His expertise includes Electromagnetics, Field Theory, Antennas, Signal and Power Integrity. Before joining Cadence, he worked at ANSYS, Inc., as an Application Engineer for High-Frequency Electronics products focusing on ADAS, RF/Antenna and Signal Integrity applications. He is expert in simulation tools such as Cadence Clarity, PSI, and ANSYS HFSS.  He contributed to several journal papers in ISI journals (IEEE Trans on MTT, IEEE Trans on Antennas and Propagation, Physical Review B, New Journal of Physics, Journal of Applied Physics), 22 international conference papers, and 1 book chapter.

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