EDI CON Online
Title: Using TDR to Solve Signal Integrity Issues
Date: October 20, 2020
Time: 12pm PT / 3pm ET
Sponsored by: Rohde & Schwarz
Presented by: Randy White, Business Development Manager
Gone are the days where only basic voltage and timing measurements would suffice for validating a high-speed design. Large-scale design integration with devices such as SoCs or FPGA require strict impedance control, tight timing references and a host of other complex parameters to manage. How do you efficiently address signal integrity issues? Where do you start debugging? In this talk, you will learn about new tools that can help you be more efficient at debugging signal integrity issues.
Randy White has spent the last 15+ years investigating Signal Integrity measurement techniques including de-embedding algorithms for real-time and sampling oscilloscopes. He has participated on many standards committees including PCI-SIG, USB-IF, SATA-IO, and JEDEC to help define new test methodologies. He graduated with a BSEE from Oregon State University.
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