Recently, Signal Integrity Journal caught up with Todd Cutler, Keysight’s VP and General Manager for Design & Test Software about product development, innovation, and the latest developments in SI/PI design.
Todd is well known in the industry for his expertise in EDA, and he was one of the founders of group that became HP-EESOF. Throughout his career, he has held positions at Hewlett Packard, Eagleware, Agilent, and then Keysight. He holds a BA in electrical engineering from Georgia Tech and a MA from Stanford. Here is a summary of our conversation, edited for length.
SIJ: What are the greatest technical challenges facing SI/PI/EMC/EMI simulation?
The industry is facing two great technical challenges: first, every SI engineer needs high-accuracy electromagnetic (EM) simulation in less time to simulate more of the PCB, and thereby catch more signal interference before prototyping. Achieving such high performance on complex board designs takes an innovative approach. Simulation techniques must become more intelligent by segmenting domains and using the strengths of multiple EM technologies to scale simulations without sacrificing accuracy. To the user, it appears as quick resolution, but there is a lot of EM ‘know-how’ under the hood.
The second challenge is connecting the workflows of multiple disciplines. For example, achieving EMI specs can be challenging, especially in automotive applications. Our experience shows that typical EMI issues are often rooted in poor PI design. To simulate emissions with confidence, an EMI engineer needs to use suitable waveforms for stimulus to the simulation, but those waveforms and associated models need to come from PI designers. It requires more than optimizing the work of an individual engineer; a workflow must connect the results of one designer to another.
SIJ: What are the most common SI/PI related questions that you are hearing from your customers?
Typically, our customers have a list of digital interface standards that they want us to support. This tells us that designers just do not have time to be an expert on all interfaces and wish to work as efficiently as possible. The more help the EDA tool can provide, by way of standard specific testbenches such as a PCIe add-in card or MIPI C-PHY link, the faster the design reaches sign-off.
A common PI question is: how do I design for a flat target impedance on my power distribution network (PDN)? To answer this question, Keysight has worked closely with industry experts such as Steve Sandler of Picotest, to come up with a practical methodology to combine behavioral modeling of the voltage regulator module (VRM), measurement-based-models of decaps, and EM simulators such as PIPro within PathWave ADS, to extract the parasitics of the PCB. When combined in a top-level PI-system simulation, the PI designer can easily analyze transient effects such as how well their PDN can respond to step-changes from one power-state to another and achieve the desire flat impedance.
SIJ: Four years ago, Keysight opened its Atlanta software development center in conjunction with Georgia Tech. How has the mission of this group evolved since its founding?
The mission of the design center has not changed from its founding: to create a modern, web-first software platform to accelerate the design-test workflow. We have staffed the center with exceptional computer science and electrical engineering talent. We also work closely with Georgia Tech to leverage their research into high-performance computing and human-computer interaction.
Earlier this year, Keysight engaged Dimensional Research to survey 300 design and test engineers and managers about their main challenges in getting products to market. The overwhelming response was that the biggest challenge in modern design is correlating design and test results. More than 48% of the respondents spent more than three months on this task. In fact, 91% spent more than a month. Deeper analysis reflected that much of this lost time is the result of using multiple tools with multiple setups and data formats that require days and weeks of work to translate and adapt. No place is this challenge greater than in high-speed design.
The Atlanta center is developing an open, scalable, and predictive platform to help customers connect the workflow and accelerate design. It aggregates data from multiple design and test sources using a Common Data Model to support high-performance correlation and advanced analytics. Designed for the cloud, it is scalable from small business to large enterprise needs
SIJ: Tell us about one of your latest products as regards SI/PI issue simulation and test, how did it come about, what was the evolution, and what technical or market challenges had to be overcome?
We recently released a new feature in PathWave ADS called Memory Designer, which addresses the increasing complexity of DDR memory. Put simply, designers struggle with setting up EM simulations, having too many S-parameter ports to manually wire up in a schematic, too many model parameters and topology changes, and finally too many figures-of-merit to measure.
The development of Memory Designer began with a conscious decision to take a step back from our prior DDR simulation technologies and put deep thought into the top issues that customers have with their current workflow. Keysight architected a new use-model with enough intelligence and automation in both EM and schematic setup to remove as much menial work as possible from the designer’s life. Today, a designer can setup a complex design in a few minutes that previously took hours and multiple schematics. However, now that the design is ready for system simulation, the next design challenge presents itself: vanishing margins.
SIJ: Many SI/PI designers are becoming more concerned about memory design; how are you addressing this?
At the highest data rates, the margin left for the PCB channel is very small. As the realm of LP/DDR5 rapidly approaches, the eye openings are predicted to be small enough that DRAMs will use decision feedback equalization (DFE) for the first time. This is a significant disruption in the world of modeling and simulation.
Up until now, many DDR designers have been tied-into transient SPICE simulators for analysis. With the introduction of equalization, the industry is adopting IBIS-AMI for behavioral modeling of LP/DDR5 and innovative channel simulation techniques. These methods support simulations of data eye contours down to low BERs in much less time. This progression to IBIS-AMI is not without hurdles, as AMI was originally developed for differential SerDes applications. We have been working with our customers to navigate this new disruption and adapt IBIS-AMI to suit single-ended signaling and channel simulation now with an external clock signal.
SIJ: Can you share your product roadmap for SI/PI related products?
As mentioned earlier, Keysight is investing in the development of a platform known as PathWave to unify the design-test workflow. It’s a huge investment that is connecting our industry-leading simulation tools with our high-performance test solutions. We realize that our customers’ bleeding-edge technology requires a wide range of tools, so we are actively working with third-parties, including our competitors, to create this workflow. An example of how this might appear for a designer is a design dashboard that can automate simulations, generate reports, and easily compare measurements of simulated data to physical measured data. Thus, delivering a more efficient workflow by ways of greater automation and deeper insights into the readiness of a product in development.
In addition, we are investing in R&D to advance our leading technology in both design and test. In channel and EM design simulation, work on core underlying algorithms never ceases as we continue to learn from our customers and optimize our technology to their evolving needs.
In the test area, we are committed to providing the highest-performance solutions in the market. A great example is the UXR oscilloscope, the first 110GHz 4 channel real-time scope in the industry, which provides true insight into the highest speed signals such as 256 QAM 1 terabit communication channels.
SIJ: How do you foster innovation at Keysight?
Innovation is the key to value creation: we make a contribution by inventing something better than what has ever been done before. Keysight’s approach to innovation is incorporated in the Keysight Leadership Model. Let me describe a few of the areas that focus our teams on innovation.
The first step is to keep our entire organization focused on customer success; it’s at the center of the model. We must understand our customers’ “day in the life” so we can identify their business and needs. While there are many ways this insight is developed, I personally emphasize one: in my organization, every employee must have at least one meaningful face-to-face interaction with a customer every year. “Meaningful” means that we are listening and learning from our customers, not just explaining our cool new products.
Second, in Market Insight, we encourage our people to investigate and explore emerging technologies and industry trends. Combining the understanding of important customer needs with the latest technologies creates a rich environment for innovation.
Third, Keysight places a huge emphasis on First to Market Solutions. If a solution is first, it is innovative. Our business strategy is not to just react to customer requests or be the cheapest in the market, it is to help our customers by anticipating their needs and bringing solutions to market first.
Last, but by no means least, is Employee Growth. From our founding days as Hewlett-Packard, we have striven to hire the very best people, support their personal development, and create an environment that allows people to think and act freely. These four steps create the environment for innovation that is critical for customers’—and Keysight’s—success.