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High-Speed Interconnect Design and Correlation at 112 Gbps PAM: How does this affect me?

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When

9/12/19 2:30 pm to 9/12/19 3:00 pm EDT

Contact

Location: Online

Event Description

Title: High-Speed Interconnect Design and Correlation at 112 Gbps PAM: How does this affect me?

Date: September 12, 2019

Time: 11:30am PT / 2:30pm ET

Presented by: Scott McMorrow, CTO, Samtec’s Signal Integrity Group, Inc.

Abstract:

Prototype 112 Gbps PAM4 silicon is already available. Production 112 Gbps PAM4 silicon is just around the corner. Routing 112 Gbps PAM4 signals through a system poses many challenges for designers. In this course, SI expert Scott McMorrow will detail an interconnect design process from concept and design through simulation, testing and correlation to high-volume manufacturing. He will explore how the correlation between simulated and tested and measured results builds confidence in a design process.

Presenter Bio:
Scott McMorrow currently serves as CTO for Samtec’s Signal Integrity Group, Inc. As a consultant for years too numerous to mention, Scott has helped many companies develop high performance products, while training signal integrity engineers. Today he works for "the man," where he continues being a problem solver, a change agent and "betting his job" every day. 

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