The PCI-SIG technical work groups are hard at work on the PCI Express® (PCIe®) 8.0 specification, and we are pleased to announce that draft 0.5 is now available for member review–ahead of schedule for a typical draft 0.5 release. This is the official first draft of the specification, incorporating all the feedback we received from members after the release of draft 0.3 in September 2025. With this release, the PCIe 8.0 specification remains on track for full release by 2028.
PCIe 8.0 Specification Objectives:
- Delivering 256.0 GT/s raw bit rate and up to 1.0 TB/s bi-directionally via x16 configuration
- Evaluating new connector technology
- Ensuring latency, FEC and reliability targets are achieved
- Maintaining backwards compatibility with previous generations of PCIe technology
- Improving bandwidth through protocol enhancements
- Reducing power through additional techniques
The goal of PCIe 8.0 specification is to deliver the high bandwidth and low latency needed for data-intensive markets including AI, data centers, high-speed networking, Edge computing, Quantum computing and more.
Contribute to PCI-SIG Specification Development
PCI-SIG members can access the PCIe 8.0 specification, draft 0.5 on the members workspace on Causeway. If you are not yet a member, we invite you to join the 1000+ members driving the specification today.