Items Tagged with 'latency'

Keysight Technologies, Inc. has achieved a new milestone in validating the accelerated infrastructure necessary to power the next-generation AI-driven cloud data center with Keysight's AresONE-M 800GE test platform and the Marvell Teralynx 10 Ethernet switch chip.

In this article, Cathy Liu discusses how channel error models and FEC performance analysis have been updated according to industry changes, as well as how different Ethernet coding schemes have been studied and simulated for 800GE and 1.6GE systems with 200 Gbps per lane. Liu investigates concatenated FEC with soft-decision decoding for inner code to protect 200 Gbps optical link and the effect of different FEC options on system SI.

Looking into advanced error code correction? Many techniques involve forward error correction. But what exactly is that and how does it relate to your design? Cathy Liu spells it out in this article.