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Test Vehicles for Benchmarking 3D Full-Wave Solver Performance


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12/6/18 11:00 am to 12:00 pm EST

Event Description

Title:  Test Vehicles for Benchmarking 3D Full-Wave Solver Performance 

Date:  December 6, 2018

Time:  8am PT/ 11am ET

Presented By:   Alfred (Al) Neves, CTO, Wild River Technology

Sponsored by:  SIMULIA, Dassault Systèmes 


High-speed designers who need to design test fixtures as well as backplane designers working on 10-32Gb/s NRZ to 112G PAM-4 can benefit from adopting high-confidence design methodologies when using 3D full-wave solvers. This webinar aims to help you build better test, characterization, and backplane systems, by improving understanding and avoiding the common pitfalls. The webinar specifically addresses: 

  1. What is IEEE PG370 about and how can it help signal integrity organizations to build better test fixtures?
  2.  What variables constitute good and not-so-good metrics based on specific test structures?
  3.  Why is the launch design so critical for doing stellar signal integrity?
  4. What can go wrong with both building test fixtures and achieving the EDA measurement correspondence.
  5. How do you get past a 5-10% fabrication process to build better test fixtures?
  6. Compare reference design elements that benchmark: Impedance using time domain transformed frequency domain; Frequency domain optimization versus frequency; Benchmarking mode analysis
  7. Why breaking or making specific elements pathological is very helpful for benchmarking solver tools
  8. The unique differences between NRZ and PAM-4 as related to spectral density and how does this influence your test fixture design.
  9. Challenges for 70GHz test fixture design.

Who should attend:

High speed designers who needs to design high speed test fixtures, backplane designers who are all working in 10-32Gb per second NRZ to 112G PAM-4 and need to up their game using high confidence design methodologies. 

Presenter Bio:

Alfred (Al) Neves, 
Founder and Chief Technologist at Wild River, has 30 years of experience designing and application development of semiconductor products, capitol equipment design focused on jitter and signal integrity analysis, and has successfully been involved with numerous business developments and startup activity for the last 13 years. Al is involved with the Signal Integrity community as a consultant, high-speed system level design manager and engineer. Recent technical accomplishments include development of platforms and methods to improve 3D electromagnetic correspondence to measure-based methods, including advancing time and frequency domain calibration methods.

Al focuses on measure-based model development, package characterization, high-speed board design, low jitter design, analysis, and training. He earned a B.S. in Applied Mathematics at the University of Massachusetts.

Please note:
By registering for this webinar, the details of your profile may be used by Signal Integrity Journal, the presenter and the sponsor to contact you by email.