EDI CON Online
Title: Improve Power Integrity With Decoupling Solutions
Date: October 20, 2020
Time: 11am PT / 2pm ET
Presented by: James Drewniak, Curator’s Professor Emeritus of Electrical and Computer Engineering, Missouri S&T EMC Laboratory
A typical PCB high-speed digital design application can have tens to hundreds of decoupling capacitors for a high-speed power domain, in order to achieve a specified target impedance. Design choices for applying the decoupling capacitors include where to place them, how to connect them, what values to use, and how many to use. This presentation will give a brief overview of the inductance contributions of each part of the current path from the decoupling capacitors to the IC package, and how each piece of the inductance is related to the power distribution network impedance. Then a systematic approach for developing a decoupling solution addressing the typical design choices will be presented.
James Drewniak received BS, MS, and PhD degrees from the University of Illinois at Urbana-Champaign, and was with the Missouri S&T EMC Laboratory for 28 years as a professor. His research interests are in signal and power integrity, electronic packaging, and EMC. Upon retirement in 2019, he became president of Clear Signal Solutions, a software company developing a tool set for S-parameter measurements and applications.
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