EDI CON Online

Title: Demystifying PCB Transmission Line Interconnect Modeling for High-level Design

Date: October 13, 2020

Time: 9:30am PT / 12:30pm ET

Presented by: Bert Simonovich, Signal Integrity and Backplane Consultant | President, Lamsim Enterprises Inc.

Abstract:
During the high-level design stages for new a project, board designers are often overwhelmed when trying to choose appropriate diff pair geometry, board material, and stackup to meet high-speed serial link loss budgets. Part of the printed circuit board (PCB) interconnect challenge is modeling transmission lines accurately. Although many EDA tools include the latest and greatest models for conductor surface roughness and wide-band dielectric properties, obtaining the right parameters to feed the models is always a challenge. So how do we get these parameters? Often the only sources are from data sheets. In most cases the numbers do not translate directly into parameters needed for these tools. By using dielectric material properties, copper foil and oxide alternative roughness parameters from data sheets, a practical method of modeling high-speed PCB interconnect is presented.

Presenter Bio:

Bert Simonovich graduated from Mohawk College of Applied Arts and Technology in Hamilton, Ontario, Canada as an Electronic Engineering Technologist. Over a 32 year career at Bell Northern Research and later Nortel, he helped pioneer several advanced technology solutions into products and has held a variety of R&D positions, eventually specializing in backplane design. He is the founder of Lamsim Enterprises Inc. providing innovative signal integrity and backplane solutions. He is currently engaged in signal integrity, characterization and modeling of high-speed serial links associated with backplane interconnects and modern IP router designs. He holds two patents and author of several publications.

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