Pat Hindle, SIJ Contributing Editor
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Pat Hindle

Pat Hindle is responsible for editorial content, article review and special industry reporting for Signal Integrity Journal and Microwave Journal magazines plus their web sites. He also leads social media and special digital projects. Prior to joining the Journals, Mr. Hindle held various technical and marketing positions throughout New England, including Marketing Communications Manager at M/A-COM (Tyco Electronics), Product/QA Manager at Alpha Industries (Skyworks), Program Manager at Raytheon and Project Manager/Quality Engineer at MIT's Space Nanostructures Laboratory. Mr. Hindle graduated from Northeastern University - Graduate School of Business Administration and holds a BS degree from Cornell University in Materials Science Engineering.

Imec Develops Method for Co-Integration of GaN Half-Bridge With Drivers to Boost Performance

June 18, 2019

At PCIM 2019 last month, imec announced a functional GaN half-bridge monolithically integrated with drivers. The release described how mounted on a buck-convertor test board, the chip converts an input voltage of 48 V to an output voltage of 1 V, with a pulse width modulation signal of 1 MHz. The achievement leverages on imec’s GaN-on-SOI and GaN-on-QST® technology platforms, reducing parasitic inductance and boosting commutation speed.

The release went on to say that GaN power electronics are dominated by off-the-shelf discrete components.  Half-bridges –common sub-circuits in power systems – are fabricated by separate discrete components, either in separate packages, or integrated in one package, especially for the higher voltage ranges.  Realizing half-bridges on chip by using GaN-on-Si technology, is very challenging, especially at high voltages. This is because half-bridges designed on GaN-on-Si technology are limited in performance by a back-gating effect that negatively affects the high-side switch of the half-bridge, and switching noise that disturbs the control circuits.

To unlock the full potential of GaN power technology, imec monolithically co-integrated a half-bridge and drivers in one GaN-IC chip. Complemented by low voltage logic transistors, a suite of passive components for low-ohmic and high-ohmic resistors, and a MIM-capacitor, high-end integrated power systems can be realized on one single die. 

Imec’s solution builds on imec’s GaN-on-SOI and GaN-on-QST® technology platforms that allow for a galvanic isolation of the power devices, drivers and control logic, by the buried oxide and oxide-filled deep trench isolation.  This isolation scheme not only eliminates the detrimental back-gating effect that negatively affects the high-side switch of the half-bridge, but also reduces the switching noise that disturbs the control circuits. With the design of a co-integrated level shifter for driving the high-side switch, a dead-time controller to avoid overlapping gate input waveforms, and an on-chip pulse-width modulation circuit, highly integrated buck and boost convertors can be fabricated.

In their 2018 presentation at the International Workshop on Nitride Semiconductors, they presented on this topic with the following summary:

Monolithic integration of GaN power ICs has recently attracted extensive attention because of the higher switching speed, better power conversion efficiency, and more compact chip volume [1, 2]. However, the influences of the isolation between the neighboring devices as well as the substrate bias are still unclear. Imec has recently demonstrated that GaN-on-SOI with trench isolation can effectively isolate the devices, suppress the crosstalk, simplify the substrate bias, and eliminate the backgating effect [3, 4]. Half-bridge on GaN-on-Si reference wafer and that on GaN-on-SOI with trench isolation are fabricated in comparison. The fabricated 36 mm e-mode p-GaN HEMTs on GaN-on-SOI show a low ON-resistance of 6 Ω mm, a high threshold voltage of 2.5 V, and a low OFF-state drain leakage of below 1 μA/mm (@ VDS=200 V). The horizontal leakage of the trench isolation and vertical leakage of the SiO2 buried layer both exceed 500 V, which satisfies the requirements for 200 V applications. For GaN-on-Si, the common conductive Si(111) substrate can be only fixed at one voltage. In contrast, thanks to the trench isolation, the Si(111) device layers under each devices on GaN-on-SOI can be separately biased. To mimic the real working state of the high side (HS) device in a half-bridge, source voltage VS2 for the device is biased at 0, 100, and 200 V, and the VG2-S2 and VD2-S2 are kept at 5 and 1 V, respectively. 50% current reduction is observed on the HS on GaN-on-Si because of the depletion of the 2DEG by the negative voltage difference VB-S2, which is known as backgating effect. In contrast, this problem is totally eliminated on GaN-on-SOI because the trench isolation makes the substrates of the HS and low side (LS) possible to be connected to their respective source terminal to keep VB1-S1 = VB2-S2 = 0 V.

To further boost the performance of these monolithic integrated power systems, imec aims to extend its platform with additional co-integrated components, such as Schottky diodes and depletion-mode HEMTs. 

To foster innovation in the GaN power electronics, this GaN-IC platform is available for prototyping through our multi-project-wafer (MPW) service. The possibilities for high-end power systems with unprecedented performance, either in switching speed, operating frequency or energy efficiency, with reduced inductive parasitics and unseen reduction of the form-factors, will further boost the use of GaN for power supplies in the consumer and re-useable energy market segments.

[1] D. Reusch et al., in Proc. ECCE, IEEE, Sep. 2015, pp. 381–387.
[2] B. Weiss et al., in Proc. WiPDA, IEEE, Nov. 2016, pp. 215–219.
[3] X. Li et al., IEEE Electron Device Letters, 38, 918 (2017).
[4] X. Li et al., IEEE Electron Device Letters, doi: 10.1109/LED.2018.2833883.

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