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Designing Switched-Mode Power Supplies in the High di/dt Era, Keysight Technologies Seminar


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11/7/18 to 11/15/18

Event Description

The increasing demand for reliable, low cost, high power density power electronics is driving up the edge speed (di/dt) of switched mode power supplies. In this high di/dt era, layout parasitics become increasingly troublesome. Traditional design techniques are not adequate. A new methodology that adds post-layout design and simulation is required. In this seminar, we will present four papers that address these challenges:

  • Introduction to Designing Switched-Mode Power Supplies in the High di/dt Era
  • Controlling Post-layout Parasitic Effects
  • Understanding and Controlling EMI
  • Optimizing Closed Loop Performance

This seminar will illustrate how to overcome these issues using ADS circuit simulators and field solvers.

High di/dt SMPS designers who are concerned about voltage spikes from layout parasitics.


Wednesday, November 7
Keysight Technologies
40 Shattuck Road
Andover, MA 01810

Wednesday, November 14
University of Arkansas
(ENRC) Engineering Research Center
700 Research Center Blvd
Fayetteville, AR  72701

Thursday, November 15
Keysight Technologies
800 Perimeter Park, Suite A
Morrisville, NC 27560