Title: PCB Design Rules that Really Matter
Date: June 19, 2018
Time: 8am PT/ 11am ET
Presented By: Tracey Vincent, Application Engineer, CST GmbH
Sponsored by: CST
We all use rule checking when creating a printed circuit board design. However, most of the rules that we check against apply to manufacturing. Passing those rules will not guarantee that our board meets the stringent signal integrity, power integrity, and electromagnetic compatibility (EMC) requirements of today’s high speed, low power and highly integrated systems.
While some performance related measures (such as differential net length) can be checked for in modern PCB layout platforms, the thresholds for these measures must be defined by the user. Unless this user is a seasoned expert in the field of signal integrity power integrity and EMC, he or she will run a high risk of choosing thresholds that are too conservative or too aggressive, leading to over design or failure.
This presentation introduces CST STUDIO SUITE Rule Check®: A smart design rule checking platform that includes knowledge of signal parameters such as rise/fall times, voltage swing, and data rate. CST STUDIO SUITE Rule Check assigns a validated set of geometrical thresholds to each net individually, depending on the signal that it carries (DDR, PCI, Ethernet, USB). Learn how CST STUDIO SUITE Rule Check takes rule checking to the next level.
Tracey Vincent is an Application Engineer with CST of America and has a combined Bachelors/Masters Degree in Electrical and Electronic Engineering from Herriot-Watt University in Edinburgh, Scotland. She also completed a Masters degree at Napier University, Scotland UK, where she wrote an FEA program to solve fields in ferrimagnetic materials. Tracey has ten years experience as a design engineer. She completed her Ph.D. at WPI in Worcester, MA, in 2009, where she investigated the effect of material topography on RF signal loss.
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