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SFBAC PELS Presents: Power Integrity Workshop

SFBAC PELS Presents: Power Integrity Workshop


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5/17/18 1:00 pm to 5/17/18 5:00 pm PDT


Location: Texas Instruments | Building E Conference Center
2900 Semiconductor Drive
Santa Clara, CA
United States

Event Description

SFBAC PELS Presents: Power Integrity Workshop

The local, national, & globally awarded SFBAC (combined Santa Clara Valley, San Francisco, & Oakland/East Bay) IEEE Power Electronics Society (PELS) is very pleased to invite you a very special event in lieu of our May chapter meeting. We are hosting a half-day workshop devoted to Power Integrity, which is a continuation in a series of special workshop events to be announced throughout the year. Event details, including details about the agenda and instructor, can be found below.

THEME: “Power Integrity Workshop

Power Integrity (‘PI’) is driving design performance. Many hi-reliability industries have focused on the “PI ecosystem” and its impact on high performance circuit designs, though awareness of PI issues and its ramifications have still not reached the majority of design engineers. With each new generation of high speed digital and RF circuitry, your designs are expected to perform at higher frequencies while the supply voltages are being reduced to meet new power efficiency goals. As the result, circuits have become increasingly sensitive to power supply noise and PDN impedance mismatches. As voltage margins have decreased, even minor variations in the supply voltage interacting with your PCB design have large detrimental impacts on system performance. This talk will focus on testing, simulating, and optimizing your power supply, power delivery network (PDN), and their integral components, for successful power integrity design.


  • Lecture

    • Introduction to Power Integrity

    • The Power Supply and its Relationship to Target Impedance

    • Flat Impedance and Decoupling Design

    • Simulation and Modeling for PI

  • Demonstrations

    • Non-Invasive Stability Measurement (NISM)

    • Differences Between 1- and 2-port Measurements: Components & Circuits

    • The PDN Measurements: 2-port Shunt Thru Impedance Measurement

About the Speaker

Steve Sandler has been involved with power system engineering for nearly 40 years. Steve is the founder and CTO of AEi Systems, a company specialized in worst case circuit analysis for high reliability industries and the CEO of, a company specializing in instruments and accessories for high performance power system and distributed system testing.

He frequently lectures and leads workshops internationally on the topics of Power Integrity and Distributed Power System Design. He is a Keysight Certified EDA expert. Steve is also a recent Winner of the Jim Williams ACE Award for Contributor of the Year (2015) and a 2-time Test & Measurement Test Engineer of the Year Finalist.

Steve publishes articles and books related to power supply and power distribution network performance and power systems modeling. His latest book, “Power Integrity: Measuring, Optimizing and Troubleshooting Power-Related Parameters in Electronics Systems” was published by McGraw-Hill in 2014. Most recently he was the recipient of both the DesignCon 2017 and EDICON 2017 Best Paper Awards.

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