Pat Hindle, SI Journal Contributing Editor
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Pat Hindle

Pat Hindle is responsible for editorial content, article review and special industry reporting for Signal Integrity Journal and Microwave Journal magazines plus their web sites. He also leads social media and special digital projects. Prior to joining the Journals, Mr. Hindle held various technical and marketing positions throughout New England, including Marketing Communications Manager at M/A-COM (Tyco Electronics), Product/QA Manager at Alpha Industries (Skyworks), Program Manager at Raytheon and Project Manager/Quality Engineer at MIT's Space Nanostructures Laboratory. Mr. Hindle graduated from Northeastern University - Graduate School of Business Administration and holds a BS degree from Cornell University in Materials Science Engineering.

Meeting Chiphead

DesignCon 2016 Summary

January 29, 2016

It was fun meeting Chiphead for the first time at DesignCon 2016. The event covers areas such as PCB design tools, power and signal integrity, jitter and crosstalk, high-speed serial design, test and measurement tools, parallel and memory interface design, ICs, semiconductor components and more. The test/measurement, software and connector companies dominate the exhibition. As the speed of digital electronics has increased, the techniques and methods for digital and RF/microwave design have converged so it was interesting to see the similarities between the two worlds. Below are highlights from what we found on the exhibition floor while visiting many of the companies represented at the event.

Chiphead Theater

Anritsu featured six solutions in its booth including a 56G NRZ and PAM4 Accurate Jitter Tolerance Test System. The solution satisfies the high accuracy and margin requirements of communications standards such as OIF, IEEE, and InfiniBand. Next was the MP1800A with the MP1825B and MG3710A Vector Signal Generator that conducts jitter tolerance tests on PCIe and 100GE interfaces.  Also, a 40/100G AOC and Q-SFP Test Solution with demonstrations on proven techniques and steps required to conduct accurate Active Time Domain (ATD) testing of Active Optical Cables (AOCs) in accordance with IBTA standards will be performed.  Their 70 GHz 4-port Signal Integrity Solution – Techniques to properly probe PCBs to conduct signal integrity measurements using the VectorStar® VNA and a GigaProbe test station were highlighted.   They also showed off the 4-Port 70 kHz to 110 GHz Broadband VNA Solution, the VectorStar ME7838A4 Broadband series system, which conducts on-wafer device characterization.  And finally, Anritsu’s new 43.5 GHz 4-port Performance ShockLine™ VNA that is integrated with the Wild River Technology CMP-28/CMP-32 channel modeling platform to conduct differential S-parameter measurements.

ANSYS introduced their 17.0 release that features 10x More Productivity for Chip-Package-System Workflows. The ANSYS chip-package-system design flow delivers productivity and capability gains with this release. Algorithmic improvements for power integrity, signal integrity and EMI analysis deliver simulation capacity and simulation speed.  New automated thermal analysis and integrated structural analysis capability deliver the most robust and productive coupled chip-aware and system-aware simulation for the chip/package/system design in the industry, enabling customers to deliver smaller, lower-power, more portable devices. The 17.0 full product release benefits many industry segments from Aerospace to Healthcare. 

CST simulation tools have a strong background in applications from classical microwave into the terahertz regime and are well suited to the challenges of high-speed digital design. Engineers in the electronics industry use the CST STUDIO SUITE® software package to analyze Signal and Power integrity. Wild River Technology meanwhile markets products for high-speed signal integrity engineers who need to characterize high-speed digital systems very accurately. Through the cooperation of CST and WRT, simulations can now be verified against measurements using the CMP-28 Channel Modeling Platform. This is powerful tool for the development of high-speed systems, and includes a range of structures for benchmarking 3D EM simulations and verifying simulation and measurement methods.

KeysightKeysight Technologies announced the launch of two EM software solutions designed to help signal integrity (SI) and power integrity (PI) engineers improve high-speed link performance in printed circuit board (PCB) designs. The solutions – SIPro and PIPro – will be available in the newest release of Keysight EEsof EDA’s Advanced Design System (ADS) software. SIPro uses a new composite EM-technology that delivers high-frequency accuracy, together with the speed and capacity required for densely-routed cutting-edge PCB design. When compared to gold-standard Finite Element Method (FEM) simulations, SIPro demonstrates very good agreement at a small-fraction of the time and memory consumption, even above 20 GHz. The PIPro solution is a collection of three PI-specific simulation engines for DC IR drop, AC power delivery network (PDN) impedance, and power plane resonances analysis. Keysight also introduced a multi-channel BERT solution based on a 14-slot AXIe mainframe for multi-lane testing. The BERT uses the latest version of the M8070A system software, version 3.0. The M8000 series of BER test solutions provide faster insight into multi-channel applications. They also announced that the M8195A 65 GSa/s arbitrary waveform generator’s (AWG’s) analog bandwidth increased from 20 GHz to 25 GHz. This performance increase guarantees even greater signal quality, with up to four fully synchronized channels. They also introduced a comprehensive N8833A and N8833B crosstalk analysis application to assist in the diagnosis of crosstalk. The application not only detects and quantifies the presence of crosstalk, but it can determine which aggressors are primarily responsible.

Isola participated in a panel discussion titled, “Isn’t Gbps Design Complex Enough? Now High Speed Circuit Boards Act Like Microwave Components.” As speeds increase, digital signals interact with dielectrics at microwave frequencies. Dielectrics are fairly well behaved at Analog and RF frequencies (<1 GHz). However, at microwave frequencies the dimensions of many circuit features begin to be on the same order of magnitude as the wavelength. Designers need material parameters like Dk and Df to make accurate models and fabricators need these same parameters to optimize line widths. Often the designers use one set of numbers and the fabricator uses different values. The panel discussed this challenge and look for solutions, especially at frequencies above 10 GHz. They also presented on Join A “Material” World, Modeling Dielectrics and Conductors for Interconnects Operating at 10-50 GBPS, PCB-Substrate Characterization at Multigigahertz Frequencies Through SIW Measurements, and Characterizing Geometry-Dependent Crossover Frequency for Stripline Dielectric and Metal Losses.

Micro-Coax launched three new micro-miniature coaxial cables and connector design capability to support them. They included the TGZ025D, a flexible cable with an outer diameter of 0.65 mm, offering performance to 18 GHz and above, the UT-020-TP, a tin-plated version of their semi-rigid cable, with an outer diameter of 0.60 mm, featuring millimeter-wave performance up to 239 GHz, and the UT-042, the newest member of their semi-rigid lineup, with an outer diameter of 1.10 mm and performance up to 122 GHz.  The 0.25 mm diameter center conductor is well suited for 1.0 mm coaxial connectors.

Molex featured High-Speed Low-Loss Flex Circuit Assemblies, fabricated using DuPont™ Pyralux® TK flexible circuit material, that are designed for electronic data transmission applications, such as servers and high-end computing, storage servers and signal processing. They also had the NeoPress™ High-Speed Mezzanine System offers system architects design flexibility through a unique triad structure, enabling the universal housing to populate 85 ohm, 100 ohm and power triads in any housing slot. There was also new Impel™ Plus Backplane Connectors that provide data rates up to 56 Gbps and include a grounding tail aligner, which allows for smaller signal compliant pins and optimizes signal integrity performance. A signal beam design improves insertion loss compared to in-line beams and pushes interface resonance frequency past 30 GHz.

NI announced a new, high-performance model of VirtualBench. The software-based VirtualBench all-in-one instrument combines a mixed-signal oscilloscope, function generator, digital multimeter, programmable DC power supply and digital I/O. With 350 MHz of bandwidth, four analog channels and Ethernet connectivity, the new version of VirtualBench offers increased functionality for engineers characterizing and debugging new designs or automated test systems. They also discussed that conventional triggering methods in oscilloscopes are challenged in capturing very rare or complex events because of the lack of flexibility and real-time analysis. New approaches can take advantage of FPGA technology to define custom triggering functions to meet the most complex triggering conditions as well as process and analyze the signal in real time. NI also released its 2016 Automated Test Outlook which discusses the overall trends in the industry.

Noisecom was demonstrating an emulation of AWGN channel and crosstalk on differential high-speed digital signals at 10.3125 Gbps (10GBase) by adding broadband AWGN. It is beneficial to signal integrity engineers analyzing the robustness of their data link against crosstalk and AWGN interference. They demonstrated the effect of AWGN on differential data lines by injecting AWGN using J7000. Separately demonstrating the effect of noise and spurs on Vcc by injecting AWGN and CW tones on the DUT using the JV9000 connected to the power supply voltage of the DUT, highlighting the degradation in signal integrity. Combining the J7000 and JV9000 they demonstrate the ability to show the interaction between noise on data lines and Vcc.

Remcom recently published a nice article on full wave matching circuit optimization (FW-MCO) which is a new technology that combines full wave, 3D electromagnetic (EM) simulation with circuit optimization into a novel approach for solving an age-old RF problem: determining which component values provide the desired match for a given matching network layout. Gone are the days of soldering components in and out of a prototype, trying to achieve the desired performance. This article describes the design process using the design of a matching circuit for a GPS-Bluetooth antenna.

Rigol was featuring their RF source that operates from 9 kHz to 3 GHz, has a stable reference clock and advanced modulation and generation features making it an advanced RF Signal Generator at an attractive price point. It is about half the price of the bigger name brand similar products.

Rogers showed off their circuit materials, including the RO4000® series. RO4000 series circuit materials include RO4003C™ laminates, with a dielectric loss tangent of 0.0027 at 10 GHz, and UL rated flame retardant RO4835™ laminates, with a dielectric loss tangent of 0.0037 at 10 GHz. RO4000 series materials feature a low z-axis coefficient of thermal expansion (CTE) over a wide temperature range for reliable plated-through-hole performance in multilayer circuits. RO4000 laminate material with Rogers Corporations’ proprietary LoPro® reverse treat copper foil solution are ideal for applications requiring low insertion loss characteristics. With its reduced electrical variability due to its smoother copper surface, RO4000 LoPro circuit materials maintain consistent performance for reliable broadband performance from Digital through RF and microwave frequencies.

RandSR&S had many test solutions for high speed digital design, signal integrity, EMI/EMC on display. They featured presentations on An Introduction to Crosstalk Measurements, Real-Time Jitter Measurements: Methods and Theory, Characterization of Signal Integrity Using S-Parameters, In-Situ De-embedding (ISD), PCB Probing for Signal-Integrity Measurements, and Measuring Jitter Using Phase Noise Techniques. They had their new R&S®Scope Rider on display that offers the performance and capabilities of a lab oscilloscope in the form factor and ruggedness of a battery-operated handheld device including 5 instruments in one package.

Signal Integrity Software Inc. (SiSoft) demonstated OptimEye™, which works with SiSoft’s Quantum Channel Designer (QCD) software to automatically identify the right combination of TX & RX settings to maximize a serial link’s operating margin. OptimEye identifies the ideal balance without requiring large “blind sweeps” of settings normally used to search a design space for potential solutions. This runs faster, produces less data and eliminates the need for custom scripts typically used to post-process swept simulation results. OptimEye™ runs fast enough to make generating custom equalization settings for each channel in a large system practical.

Teledyne LeCroy announced the availability of an interposer probe for analysis of PCIe External Cable 3.0 ports that utilize the new PCI Express External Cabling Specification Revision 3.0, developed by the PCI-SIG®.  The PCIe External Cable 3.0 Interposer enables PCIe® bus traffic between a system board and storage devices using PCIe External Cable 3.0 cables to be monitored, captured and recorded for protocol analysis. They also expanded the capabilities of its oscilloscopes with the introduction of the HDA125 High-speed Digital Analyzer. The HDA125 digital acquisition system captures 18 channels of digital data at 12.5 GS/s. Finally, they released the Power Delivery Compliance Suite for the Voyager M310C SuperSpeed USB 3.1 protocol verification platform. Based on the Power Delivery (PD) Compliance Plan v1.0, this automated test suite, allows developers to verify functionality, error recovery, and compliance for PD chipsets and end-products.

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