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Home » Ensuring High Signal Quality in PCIe Gen3 Channels
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Signal Integrity

Ensuring High Signal Quality in PCIe Gen3 Channels

Anil Kumar Pandey
March 14, 2017
Anil Kumar Pandey
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The increased data rates of today’s high-speed Input/Output (I/O) buses make maintaining transmission channel signal quality all the more challenging. One reason for the challenge is the parasitic effects that result from bus interconnects. Over the past decade, data rates for electrical interconnects have experienced a dramatic increase—from 1 Gbps to 25 Gbps and beyond—to meet the ever increasing demand for more I/O bandwidth from modern networking applications and high-capacity storage.

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