We use cookies to provide you with a better experience. By continuing to browse the site you are agreeing to our use of cookies in accordance with our Cookie Policy.

Header logo
  • Sign In
  • Subscribe
  • Sign Out
  • My Account
Nav logo
  • Signal Integrity
  • Power Integrity
  • EMC/EMI
  • News
    • SIJ Weekly Newsletter
  • Resources
    • Buyer's Guide
    • eBooks
    • Videos
    • White Papers
    • Sponsored Content
    • Submit an Article
    • SI/PI/EMI Consultants
  • Community
    • Blogs
    • Editorial Advisory Board
    • Social Media
  • Events
    • Trade Shows
    • Upcoming Webinars
    • Archived Webinars
    • Photo Galleries
  • Advertise
Home » Accurate Statistical-Based DDR4 Margin Estimation Using SSN Induced Jitter Model
Looking to read the full article? Register today!
Power Integrity

Accurate Statistical-Based DDR4 Margin Estimation Using SSN Induced Jitter Model

HeeSoo LEE, Cindy Cui, Heidi Barnes, and Luis Boluna,
March 1, 2017
HeeSoo LEE, Cindy Cui, Heidi Barnes, and Luis Boluna,
No Comments
Here's a proposed method that improves the accuracy of DDR4 statistical simulation by using the mask correction factor. It presents a validated correlation between measured and simulated data to show that this methodology can be effectively used for DDR4 design

Related Articles

Statistical-Based RE DCD Jitter Analysis in High-Speed NAND Flash Memory

Practical Method for Modeling Conductor Surface Roughness Using Close Packing of Equal Spheres

Efficient Sensitivity-Aware Assessment of High-Speed Links Using PCE and the Implications for COM

To view the full article, please register or login.
  • Free Newsletter
    • Subscribe Now

Buyer's Guide

LogoVisit Buyer's GuideGet Your Company Listed

Popular Posts

  • SIJ Publishes 2021 Issue!
  • Characteristic Impedance – Where SI/PI Worlds Collide
  • A Low-Cost Capacitor Characterization System
  • Concepts of Signal Integrity: Crosstalk
  • EDI CON Online Continues To Drive Impressive Results

Featured Videos

Capture1

Rohde & Schwarz Demonstrates Power Integrity Measurements with a RTP Oscilloscope

Ansys1

EMC/EMI

Mitigate EMI Issues in PCBs using SIwave By ANSYS

See More Videos
  • COMPANY
    • About Us
    • Contact Us
    • Advertise with Us
    • Submit an Article
    • Privacy

SIGNAL INTEGRITY JOURNAL

685 Canton St. Norwood, MA 02062
Tel: (781) 769-9750 Fax: (781) 769-5037
email: editorial@signalintegrityjournal.com
EDI CON Online
Copyright Signal Integrity Journal
© 2021. All Rights Reserved
Design, CMS, Hosting & Web Development | ePublishing