When we think of PDN, the first images that usually come to mind are FPGA’s and CPU’s. These circuit generally require ultra-low PDN impedance in order to maintain the appropriate voltage at the FPGA or CPU during the large dynamic current variations these devices present.
This study focuses on a much smaller scale addressing a very simple circuit comprised the related PDN issue. While the issues shown here may seem obvious to some, this is an excellent example of what is a very common problem.