Keysight Technologies, Inc. announced that it will introduce the world's first design and test workflow solution that reduces product development time for double-data rate dynamic random-access memory (DDR5 DRAM) systems at DesignCon 2020 (Booth 725).

As data center throughput climbs, performance expectations of servers and high-performance computing drive the need for next-generation high-density ultra-fast memory, or DDR5 DRAM.   Running at twice the data rate of DDR4 results in shrinking design margins and it becomes difficult for a hardware designer to optimize the printed circuit board (PCB) to minimize the effects of jitter, reflection, and crosstalk. Heavily distorted signals can be recovered with decision feedback equalization (DFE), an addition for DDR5 DRAM, which disrupts the traditional measurement and simulation approaches used for earlier generations of DDR.

Keysight's design and test workflow solution aims to help hardware engineers meet their time-to-market window and deliver a high-performance, reliable end-product with: 

  • Transmitter test methods to measure the signal eye diagram after equalization.
  • Loopback bit-error-rate (BER) receiver tests to validate device and system reliability.
  • Logic analysis to debug complex DDR5 traffic transactions to identify the source of system instability.

PathWave ADS Memory Designer for DDR5 is a simulation environment that addresses the current challenges faced by designers with the following features:

  • Ability to predict performance, optimize a design, and perform virtual transmitter compliance test before realizing the first hardware prototype.   
  • Reduced simulation setup time from hours to minutes with features such as DDR components, smart wires and an intelligent memory probe.
  • Increased simulation accuracy for DDR5 by representing receiver equalization with IBIS Algorithmic Modeling Interface (IBIS-AMI) models, enhanced specifically for the requirements of DDR.

Keysight's design and test workflow solution consists of the following products:

  • Modeling and simulation (W2225BP)
  • Probing and interposers
  • Transmitter test with oscilloscopes and compliance software (Infiniium UXR, N6475A)
  • Receiver test fixtures
  • Receiver test solution for loopback Bit Error Rate Testing (M8020A, M80885RCA)
  • Logic Analysis (U4164A, B4661A)
  • Power rail probes (N7024A)

Additional information on PathWave ADS Memory Designer is available at the following: